Memory interface Validation Engineer

East Bay, (none selected) | Direct Hire

Post Date: 06/07/2016 Job ID: 6020

Primary Responsibilities:
The employee will have full ownership of the memory interface solutions for the Speedster22i
family of FPGAs and will drive the bring-up, validation and characterization efforts. The
employee would be expected to define PHY and controller requirements for DDR3, QDRII+ and
RLDRAM3 and ensure correct implementation on the Speedster22i HD1000 FPGAs as well as
future products.

Secondary Responsibilities:
The employee will work with the software team to ensure appropriate implementation of memory
interface macros and configurations for customers in ACE (Achronix CAD Environment).
Results will need to be documented in the form of test/characterization reports and for both
internal and customer-facing collateral. The employee will be expected to generate bring-up and
reference designs, including simulation support, to highlight memory interface use-models and
demonstrate performance to customers.

Required Skills and Experience:
Expert in DDR3, QDRII+ and RLDRAM3 memory interface protocols (PHY and

• Proficient in technical writing, including characterization reports, test/verification plans
and spreadsheet based analyses.
• Strong logic design and verification background with experience in STA.
• Experience with FPGA implementations and programming, specifically pertaining to
memory interfaces
• Verilog expertise; System Verilog and VHDL knowledge is a plus
• Good communication skills and ability to multi-task
• Expert with lab test equipment, specifically those needed for DDR3 validation and
characterization – oscilloscopes, function generators, logic analyzers, DIMM/component
memory interposers
• Bachelor’s or Master’s degree in EE, CE or equivalent work experience with at least 8
years experience working on memory interface bring-up, validation and debug, including
• Other memory interface protocol interface expertise, such as HMC would be a plus.

Our company  is a privately held fabless semiconductor corporation based in Santa
Clara, California. We design high-performance, low-power FPGAs using Intel’s 22nm and 14nm
3-D Tri-Gate process technology.

Achronix is currently shipping its 22nm HD1000 FPGA, making us the only customer of Intel’s
custom foundry program to ship product, as well as the FPGA industry’s process-technology

The applications team at our company owns all customer engagements and provides the technical
support required for customers to successfully use the Speedster22i FPGAs
. The team works
closely with the internal engineering team to understand use-case scenarios and helps define
the direction and support roadmap for engineering based on customer needs and requirements.
We use a proactive approach to ensure that guidelines and documentation are provided for
customer self-help, and a reactive approach to quickly address new concerns and issues
encountered by customers in using our devices and tools. New employees will have the
opportunity to contribute to all of these aspects and work with the world’s most advanced
process technology.

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