Firmware Engineer

San Francisco, (none selected)

Posted: 02/25/2019 Employment Type: Direct Hire Industry: IT Job Number: JOS000008068

THE ROLE 

As a member of our Payload Interface and Control Unit (PICU) team, you will be helping build the company’s standard interface that enables us to host and operate a wide range of payload types. 
 
The PICU is a flight hardware unit with a high reliability and continuous operation profile. It provides hardware, firmware and software based functionality that involves the physical and protocol level interfacing with different payloads/instruments on one side and the satellite platform on the other. 
 
Since high flexibility and versatility play an important role, the PICU is quite software-centric and supports on-ground and in-space re-programmability. This company will be utilizing the latest technology available for the PICU, which includes a mix of existing and next-generation component and processor technology. 

  

GENERAL REQUIREMENTS: 

  • Must be scrappy and inventive: what you will be building has never been done before.  
  • Be prepared to be challenged and sometimes work out of your comfort zone.  
  • Willingness to be accountable, autonomous, and take full ownership of projects.  
  • Preferably experience with software/firmware developed for safety-critical applications or software developed for aerospace  
  • Awareness and understanding of mission-critical systems and related software impact  
  • A preference for agile yet process-controlled software  
  • Ability to code and document (wherever possible electronically and in-line) in a structured way  
  • Ability to work both independently as well as part of a multi-disciplined team  
  • Ability to learn and adopt to new technologies  
  • Demonstrable history of thinking outside-the-box, without losing sight of reality  
  • Experience working in both a Windows and Linux environment 

FIRMWARE REQUIREMENTS: 

  • Understanding of space electronics and specific (technology) constraints and deployment  
  • Extensive experience with VHDL and/or VERILOG  
  • Experience in working with Rad-hard or Rad-tolerant FPGAs  and SoC devices  
  • Experience with SEU mitigation mechanisms  
  • In-depth knowledge of company’s website environments such as: Libero, Vivado  
  • Affection with upcoming technologies for FPGA using OpenCL / C++  / Automatic Code Generation  
  • Experience with IP cores for interfacing and communication  
  • Experience in structured code incl. test benching, simulation and code coverage  
  • JTAG programming / debugging  
  • Preferably past experience in embedded or space hardware 

The role includes competitive compensation package, stock options, and full benefits (healthcare, vision, dental). 

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